The invention relates to a PCM time-division multiplex communication network having a plurality of PCM time-division multiplex switching centers interconnected over four-wire time-division multiplex connections. In such telecommunication networks the time-division multiplex switching centers can be constructed such that they have stores allocated individually to each pair of conductors of the four-wire time-division multiplex highways for storing all elements of information during a pulse frame -- determined by the duration of the sampling period of the time-division multiplex system -- incoming on or to be transferred over the time-division multiplex connection concerned and associated with message time slots, as well as crosspoint elements for the space-division switching of the elements of information, and address memories. The address memories are used to achieve the space and time-division coordination of the operation of the crosspoint elements and of the store allocations of the stores allocated to the individual message time slots.
In a prior PCM time-division multiplex telecommunication network of this type (West German Examined Application No. 2,108,745 ), a number of switching time slots are provided on the link network interconnecting the crosspoint elements allocated to the individual time-division multiplex connections which exceed the number of communication channels incoming on or to be transferred over the four-wire time-division multiplex (e.g., 64). As a result, virtually no connections are lost on account of the absence of idle switching time slots.
The clock pulse supply for the main stores or for the transfer storages that may be inserted therebefore or thereafter, as necessary, as well as for the address memories, according to which incoming PCM data are written in or outgoing PCM data are read out in ordered fashion in accordance with message time slots; and an addressed accessing of the main stores and crosspoint elements, achieved through the address memories in accordance with the selected switching time slot, in particular if one utilizes the increased number of switching time slots as suggested above, involves technical complexity. Thus, for example, in the circuit arrangement according to West German Published Application No. 2,108,745, there are provided in the individual switching centers for each four-wire time-division multiplex connection a line counter operated by the system clock, which counts the incoming elements of information and causes the parallel entry thereof into the incoming store; a second counter operated by the exchange clock specifies the storage row into which the entry is to be made. Two other counters are likewise operated with the exchange clock, one counter accessing the address memories and the other counter causing the readout of PCM data by accessing the main store allocated to the outgoing four-wire time-division multiplex connection in the time-division multiplex switching center. Addresses supplied by a few of said counters via two OR circuits or addresses supplied by address memories as a result of the accessing of said address memories by another of said counters are applied to the main stores of the switching center.